Changeset 233
- Timestamp:
- 10/16/08 17:51:10 (3 years ago)
- Location:
- trunk/electronics/avr/can
- Files:
-
- 3 modified
Legend:
- Unmodified
- Added
- Removed
-
trunk/electronics/avr/can/mcp.c
r228 r233 3 3 #include "spi.h" 4 4 #include "cannet.h" 5 #include "mcp.h" 5 6 6 7 #define CS PB2 … … 10 11 #define clrbit(a, b) a &= ~b 11 12 12 enum { 13 MCPWRITE = 0x02, 14 MCPREAD = 0x03, 15 MCPBITMOD = 0x09, 16 MCPTXBUF = 0x40, 17 MCPRTS = 0x80, 18 MCPRXBUF = 0x90, 19 MCPRSTAT = 0xA0, 20 MCPRXSTAT = 0xB0, 21 MCPRESET = 0xC0, 22 }; 23 24 /* TX Buffer 0 Registers. 25 * add 0x10 to each (except TXRTSCTRL) 26 * for TXBUF1, or 0x20 for TXBUF2 27 */ 28 enum { 29 TXRTSCTRL = 0x0D, 30 TXB0CTRL = 0x30, 31 TXB0SIDH, 32 TXB0SIDL, 33 TXB0EID8, 34 TXB0EID0, 35 TXB0DLC, 36 TXB0D0, 37 }; 38 39 /* RX Buffer 0 registers 40 * add 0x10 to each (except BFPCTL) 41 * for RXBUF1 42 */ 43 enum { 44 BFPCTRL = 0x0C, 45 RXB0CTRL = 0x60, 46 RXB0SIDH, 47 RXB0SIDL, 48 RXB0EID8, 49 RXB0EID0, 50 RXB0DLC, 51 RXB0D0, 52 }; 53 54 /* Yes, this is the correct order. */ 55 enum { 56 CNF3 = 0x28, 57 CNF2, 58 CNF1, 59 }; 60 61 enum { 62 CANSTATUS = 0x0E, 63 CANCTRL, 64 }; 65 66 static void mcp_reset() 13 void mcp_reset() 67 14 { 68 15 clrbit(CSP, CS); … … 71 18 } 72 19 73 staticvoid mcp_read(uint8_t addr, uint8_t *buf, uint8_t nbuf)20 void mcp_read(uint8_t addr, uint8_t *buf, uint8_t nbuf) 74 21 { 75 22 uint8_t i; … … 86 33 } 87 34 88 staticvoid mcp_read_rxbuf(uint8_t addr, uint8_t *buf, uint8_t nbuf)35 void mcp_read_rxbuf(uint8_t addr, uint8_t *buf, uint8_t nbuf) 89 36 { 90 37 uint8_t i; … … 99 46 } 100 47 101 staticvoid mcp_write(uint8_t addr, uint8_t *buf, uint8_t nbuf)48 void mcp_write(uint8_t addr, uint8_t *buf, uint8_t nbuf) 102 49 { 103 50 uint8_t i; … … 112 59 } 113 60 114 static void mcp_load_txbuf(uint8_t addr, uint8_t *buf, uint8_t nbuf) 61 void mcp_write_byte(uint8_t addr, uint8_t data) 62 { 63 clrbit(CSP, CS); 64 spi_send(MCPWRITE); 65 spi_send(addr); 66 spi_send(data); 67 setbit(CSP, CS); 68 } 69 70 void mcp_load_txbuf(uint8_t addr, uint8_t *buf, uint8_t nbuf) 115 71 { 116 72 uint8_t i; … … 125 81 } 126 82 127 staticuint8_t mcp_read_stat()83 uint8_t mcp_read_stat() 128 84 { 129 85 uint8_t stat; … … 137 93 } 138 94 139 staticuint8_t mcp_rx_stat()95 uint8_t mcp_rx_stat() 140 96 { 141 97 uint8_t stat; … … 149 105 } 150 106 151 staticvoid mcp_rts(uint8_t bufs)107 void mcp_rts(uint8_t bufs) 152 108 { 153 109 bufs &= 0x07; … … 158 114 } 159 115 160 staticvoid mcp_bit_mod(uint8_t addr, uint8_t mask, uint8_t data)116 void mcp_bit_mod(uint8_t addr, uint8_t mask, uint8_t data) 161 117 { 162 118 clrbit(CSP, CS); -
trunk/electronics/avr/can/mcp.h
r227 r233 1 1 void mcp_reset(); 2 void mcp_read(int8_t addr, int8_t *buf, int8_t nbuf); 3 void mcp_read_rxbuf(int8_t addr, int8_t *buf, int8_t nbuf); 4 void mcp_write(int8_t addr, int8_t *buf, int8_t nbuf); 5 void mcp_load_txbuf(int8_t addr, int8_t *buf, int8_t nbuf); 6 int8_t mcp_read_stat(); 7 int8_t mcp_rx_stat(); 8 void mcp_rts(int8_t bufs); 9 void mcp_bit_mod(int8_t addr, int8_t mask, int8_t data); 2 void mcp_read(uint8_t addr, uint8_t *buf, uint8_t nbuf); 3 void mcp_write_byte(uint8_t addr, uint8_t data); 4 void mcp_read_rxbuf(uint8_t addr, uint8_t *buf, uint8_t nbuf); 5 void mcp_write(uint8_t addr, uint8_t *buf, uint8_t nbuf); 6 void mcp_load_txbuf(uint8_t addr, uint8_t *buf, uint8_t nbuf); 7 uint8_t mcp_read_stat(); 8 uint8_t mcp_rx_stat(); 9 void mcp_rts(uint8_t bufs); 10 void mcp_bit_mod(uint8_t addr, uint8_t mask, uint8_t data); 11 12 enum { 13 MCPWRITE = 0x02, 14 MCPREAD = 0x03, 15 MCPBITMOD = 0x09, 16 MCPTXBUF = 0x40, 17 MCPRTS = 0x80, 18 MCPRXBUF = 0x90, 19 MCPRSTAT = 0xA0, 20 MCPRXSTAT = 0xB0, 21 MCPRESET = 0xC0, 22 }; 23 24 /* TX Buffer 0 Registers. 25 * add 0x10 to each (except TXRTSCTRL) 26 * for TXBUF1, or 0x20 for TXBUF2 27 */ 28 enum { 29 TXRTSCTRL = 0x0D, 30 TXB0CTRL = 0x30, 31 TXB0SIDH, 32 TXB0SIDL, 33 TXB0EID8, 34 TXB0EID0, 35 TXB0DLC, 36 TXB0D0, 37 }; 38 39 /* RX Buffer 0 registers 40 * add 0x10 to each (except BFPCTL) 41 * for RXBUF1 42 */ 43 enum { 44 BFPCTRL = 0x0C, 45 RXB0CTRL = 0x60, 46 RXB0SIDH, 47 RXB0SIDL, 48 RXB0EID8, 49 RXB0EID0, 50 RXB0DLC, 51 RXB0D0, 52 }; 53 54 /* Yes, this is the correct order. */ 55 enum { 56 CNF3 = 0x28, 57 CNF2, 58 CNF1, 59 }; 60 61 enum { 62 CANSTATUS = 0x0E, 63 CANCTRL, 64 }; 65 66 -
trunk/electronics/avr/can/mkfile
r228 r233 5 5 mcp.o \ 6 6 spi.o \ 7 cannet.o \ 7 8 8 9 <$RHRTELEC/avr/mkcommon

